From 5415ff65c3983ee25b04449e589fd6aaa13bd4e9 Mon Sep 17 00:00:00 2001
From: Sam Perry <17242713+sdp8483@users.noreply.github.com>
Date: Fri, 9 Sep 2022 08:04:55 -0400
Subject: [PATCH] properly reset module

danielkucera "It looks like the module is much more stable when reset bit is first set and then cleared."
---
 src/CAN.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/CAN.c b/src/CAN.c
index c6e1b7b..3c07ca0 100644
--- a/src/CAN.c
+++ b/src/CAN.c
@@ -171,6 +171,7 @@ int CAN_init() {
 
 	// enable module
 	DPORT_SET_PERI_REG_MASK(DPORT_PERIP_CLK_EN_REG, DPORT_CAN_CLK_EN);
+	DPORT_SET_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_CAN_RST);
 	DPORT_CLEAR_PERI_REG_MASK(DPORT_PERIP_RST_EN_REG, DPORT_CAN_RST);
 
 	// configure TX pin